Not applicable.
1. Field of the Invention
The invention disclosed broadly relates to the field of testing integrated circuit designs, and more particularly relates to the field of testing the protocol compliance of designs (such as Verilog designs) of a link layer for either the 1394-1995 or the 1394a bus protocols.
2. Description of the Related Art
Integrated circuit (xe2x80x9cICxe2x80x9d) designs are commonly designed in software, such as Verilog. It is useful, therefore, to test the design in software as well. Accordingly, a variety of tools have been developed to facilitate both the design and the test of ICs in software. The design itself is also commonly broken into different components, and in such development schemes it is important to be able to test the individual components of the design.
For applications that utilize either the 1394-1995 or the 1394a bus (collectively referred to hereinafter as the xe2x80x9c1394 Busxe2x80x9d), many of the protocol functions can be developed independently of the application itself and then incorporated with the application in a single Verilog design, and eventually in a single IC, or application specific IC (xe2x80x9cASICxe2x80x9d). There are three layers of interest to the present invention.
The serial bus specification for the 1394 Bus defines a Link Layer (or Link Layer Core (xe2x80x9cLLCxe2x80x9d)), with the Link Layer providing a half-duplex data packet delivery service. The Link Layer performs the protocol functions referred to in the preceding paragraph. The specification further defines a Physical Layer (or xe2x80x9cPhy Layerxe2x80x9d), to which the Link Layer interfaces and which provides lower level services such as generating the electrical signals on the transmission medium. The application itself will be referred to as the Application Layer.
The Link Layer must be able to communicate with both the Application Layer and with the Phy Layer. The 1394 Bus specification defines the connection between the Link Layer and the Phy Layer (the xe2x80x9cLink-Phy Busxe2x80x9d), but does not define the connection between the Link Layer and the Application Layer (the xe2x80x9cLink-Application Busxe2x80x9d). The Application Layer and the Link Layer can be incorporated into the same design and onto the same ASIC. In such a case, the Link-Phy bus connects two separate devices, and the Link-Application Bus is internal to the ASIC. A variety of tools have been developed to test the Link-Phy Bus, and some of these tools also define the Link-Application Bus and test that as well. Naturally, an Application Layer developer would want to know which testing tool was going to be used so that he or she could design the Application Layer to adhere to the tool""s Link-Application Bus definition if it had one.
It is a common industry practice to try to develop a test for a new product at the same time that the product is being developed. It is an ongoing challenge to keep these two developments from influencing each other, and thus to maintain the integrity and utility of the test that is developed.
The LLC, test environments typically have several features in common: (i) they employ a behavioral or functional model which requires the test commands to be written at the physical level, (ii) each device (e.g. LLC) which is part of the system under test is separately modeled (the 1394 specification allows up to 63 separately addressable devices on each bus, including bridges to other buses), (iii) the test commands are scripted in a particular order, (iv) the protocol rules are integrated into the test environment, ensuring that all operations which are performed conform to the protocol requirements, and (v) outputs from the device under test (xe2x80x9cDUT,xe2x80x9d which in this case is an LLC) are recorded but must be separately verified to determine if the test was successful. Some test environments use mathematical models of the 1394 Bus specification to verify that the protocol is being followed, but these systems are not in common use in industry.
It is an object of the invention to provide a test environment which will allow a test to be performed on different devices with a minimal amount of software revision to accommodate the different physical characteristics of the devices.
It is a further object of the invention to provide a test environment which is able to determine not only whether or not the protocol has been followed, but whether or not the expected test result has been achieved, and to be able to do this in an automated fashion. Such a test environment must be able to effectively close the loop by being able to generate the operations for the test, monitor the actual results, and compare the actual results to the expected/desired results.
It is a further object of the invention to provide a test environment that allows separate development of the design and the test system.
It is a further object of the invention to provide a test environment which is modular, so that separate modules can be used independently as part of a test and the entire test environment does not need to be used for every test.
It is a further object of the invention to provide a test environment that is topology independent, that is, whose computations do not rise geometrically when additional devices are logically added to the bus.
It is a further object of the invention to provide a test environment for which test commands can be written architecturally, that is, independently of the specific physical characteristics of the device under test (xe2x80x9cDUTxe2x80x9d).
It is a further object of the invention to provide a test environment that does not require absolute timing for every event, e.g. transmitted and/or received actions on the bus, and thus to provide a system; which can test and simulate xe2x80x9crandomxe2x80x9d events, as well as operate faster in certain cases due to a higher throughput of operations.
It is a further object of the invention to provide a test environment in which protocol failures can be injected, tracked, monitored, and reported.
It is a further object of the invention to provide a test environment which can be used to perform a particular test on a particular device in different and/or multiple bus protocols, potentially more than one protocol in a given test, and to do so with a minimal amount of software revision to accommodate the different bus protocols.
There is provided, according to one aspect of the invention, a method of testing a device. The method includes the steps of monitoring at least one output of the device, and resolving the at least one output into atomic operations. The at least one output is generated by the device in response to an applied test command. The atomic operations are substantially the smallest constituent operations which are substantially independent of the device.
There are further provided, according to other aspects of the invention, a system and a computer program product which facilitate the above method.
There is further provided, according to another aspect of the invention, another method of testing a device. The method includes the step of applying a test command to the device. The step of applying the test command includes the steps of breaking the test command into its atomic operations, and applying the atomic operations to the device. The atomic operations are substantially the smallest constituent operations which are substantially independent of the device. A generator rules section, which includes rules for the protocol and for the device and for the test command, is utilized to apply the atomic operations to the device.
There are further provided, according to other aspects of the invention, a system and a computer program product which facilitate the above method.
There is further provided, according to another aspect of the invention, a method of reconciling at least one monitored output of a device as part of a test of the device, wherein a test command has been applied to the device and the at least one output has been resolved into atomic operations. The atomic operations are substantially the smallest constituent operations which are substantially independent of the device. The method includes the steps of: reconciling the atomic operations of the at least one monitored output against at least one rule governing a protocol; and recording the results of the protocol reconciling step.
There are further provided, according to other aspects of the invention, a system and a computer program product which facilitate the above method.
There is further provided, according to another aspect of the invention, another method of testing a device. The method includes the step of utilizing a monitor rules section for monitoring outputs from the device. The monitor rules section includes output protocol rules for a protocol and output device rules for the device. Both the output protocol rules and the output device rules relate to outputs from the device.